|
[-]
[+]
|
Changed |
flashrom.changes
|
|
|
|
[-]
[+]
|
Changed |
flashrom.spec
^
|
|
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/ChangeLog
^
|
| @@ -1,4 +1,167 @@
------------------------------------------------------------------------
+r1260 | hailfinger | 2011-02-05 13:11:17 +0100 (Sat, 05 Feb 2011) | 8 lines
+
+Add support for AMD Am29LV001BB, Am29LV001BT, Am29LV002BB, Am29LV002BT,
+Am29LV004BB, Am29LV004BT, Am29LV008BB, Am29LV008BT
+
+Thanks to Mark Pustjens for testing the Am29LV001BB.
+
+Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
+Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
+
+------------------------------------------------------------------------
+r1259 | hailfinger | 2011-02-04 23:52:04 +0100 (Fri, 04 Feb 2011) | 6 lines
+
+Improve debugging for unaligned erase in the flash chip emulator.
+Fix out-of-bounds access for chip erase in the flash chip emulator.
+
+Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
+Acked-by: David Hendricks <dhendrix@google.com>
+
+------------------------------------------------------------------------
+r1258 | hailfinger | 2011-02-04 22:37:59 +0100 (Fri, 04 Feb 2011) | 12 lines
+
+Support for Angelbird Wings PCIe SSD (solid-state drive).
+It uses a Marvell 88SX7042 SATA controller internally which has access
+to a separate flash chip hosting the option ROM.
+
+Thanks to Angelbird Ltd for sponsoring development of this driver!
+
+I expect the code to work for that SATA controller even if it is not
+part of the Angelbird SSD.
+
+Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
+Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
+
+------------------------------------------------------------------------
+r1257 | stepan | 2011-01-28 10:00:15 +0100 (Fri, 28 Jan 2011) | 6 lines
+
+Support Dediprog LEDs on devices with 2 and 3 LEDs.
+
+Signed-off-by: Stefan Reinauer <reinauer@google.com>
+Acked-by: Mathias Krause <mathias.krause@secunet.com>
+
+
+------------------------------------------------------------------------
+r1256 | stepan | 2011-01-25 01:23:32 +0100 (Tue, 25 Jan 2011) | 10 lines
+
+flashrom: fix sparse warning: Unknown escape %
+
+This patch fixes wrong escaping of %.
+In print.c %%2b is correct instead of \%2b ("%%2b"=%2b=+)
+In board_enable.c %d is correct instead of \%d.
+
+Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
+Acked-by: Stefan Reinauer <stepan@coreboot.org>
+
+
+------------------------------------------------------------------------
+r1255 | stepan | 2011-01-24 20:15:51 +0100 (Mon, 24 Jan 2011) | 10 lines
+
+flashrom: fix sparse warning: Using plain integer as NULL pointer
+
+This patch fixes the "using plain integer as NULL pointer" warnings
+generated by running sparse on the flashrom source.
+
+Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
+Acked-by: Mathias Krause <mathias.krause@secunet.com>
+Acked-by: Stefan Reinauer <stepan@coreboot.org>
+
+
+------------------------------------------------------------------------
+r1254 | stepan | 2011-01-20 22:05:15 +0100 (Thu, 20 Jan 2011) | 13 lines
+
+Secret knowledge is cool, but public knowledge is better.
+Implement all Dediprog commands found in USB traces, even if their
+purpose is not yet known.
+Annotate unknown commands with info about the call sequence they are
+embedded in and the firmware version of the log.
+
+Add a new shutdown command for firmware 5.x (of which Stefan thinks it's
+"switch the Pass light on" hence it is called late in the game)
+
+Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
+Acked-by: Stefan Reinauer <reinauer@google.com>
+
+
+------------------------------------------------------------------------
+r1253 | stepan | 2011-01-19 07:21:54 +0100 (Wed, 19 Jan 2011) | 9 lines
+
+Don't print the local memory flash chip address on programmers that don't
+actually map the flash chip into local memory (like the dediprog) because
+the value does not make sense there.
+
+This version was reworked / rewritten by Mathias Krause to have less "impact"
+
+Signed-off-by: Stefan Reinauer <reinauer@google.com>
+Acked-by: Mathias Krause <mathias.krause@secunet.com>
+
+------------------------------------------------------------------------
+r1252 | krause | 2011-01-17 08:50:42 +0100 (Mon, 17 Jan 2011) | 10 lines
+
+This patch reduces the stack usage by declaring 'const' stack variables
+as 'static const' so they end up in the .rodata section instead of being
+copied from there to the stack for every invocation of the corresponding
+function. As a plus we end up in having a smaller binary as the "copy
+from .rodata to stack" code isn't emitted by the compiler any more
+(roughly -100 bytes).
+
+Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
+Acked-by: Stefan Reinauer <stepan@coreboot.org>
+
+------------------------------------------------------------------------
+r1251 | krause | 2011-01-17 08:45:54 +0100 (Mon, 17 Jan 2011) | 9 lines
+
+The AT26DF081A requires the Write Enable Latch (WLE) to be set for
+write/erase operations. Also bit 5 is the Erase/Program Error (EPE) bit,
+so has nothing to do with the block protection. Ignore it when testing
+for block protections.
+
+Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
+Tested-by: Mathias Krause <mathias.krause@secunet.com>
+Acked-by: Stefan Reinauer <stepan@coreboot.org>
+
+------------------------------------------------------------------------
+r1250 | krause | 2011-01-01 11:54:09 +0100 (Sat, 01 Jan 2011) | 8 lines
+
+Fix decoding of SB600 LPC ROM protection registers.
+
+The address part was using a bit of the size, the size was missing the
+upper bit, was off by 1023 bytes and included the protection bits.
+
+Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
+Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
+
+------------------------------------------------------------------------
+r1249 | mkarcher | 2010-12-27 00:55:19 +0100 (Mon, 27 Dec 2010) | 9 lines
+
+compilation fix for djgpp
+
+This corrects a djgpp build error, seen with r1232 and later.
+
+pcidev.c:210: error: conflicting types for 'rpci_write_long'
+programmer.h:226: error: previous declaration of 'rpci_write_long' was here
+
+Signed-off-by: Idwer Vollering <vidwer@gmail.com>
+Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
+------------------------------------------------------------------------
+r1248 | mkarcher | 2010-12-27 00:55:12 +0100 (Mon, 27 Dec 2010) | 7 lines
+
+enable unlocking (erasing/writing) W39V040FB chips
+
+Add code for the unlocking (erasing/writing) of Winbond W39V040FB
+chips, enabling erasing/writing this type of chip.
+
+Signed-off-by: Idwer Vollering <vidwer@gmail.com>
+Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
+------------------------------------------------------------------------
+r1247 | dhendrix | 2010-12-14 00:54:59 +0100 (Tue, 14 Dec 2010) | 4 lines
+
+Signed-off-by: David Hendricks <dhendrix@google.com>
+Acked-by: Stefan Reinauer <stepan@coreboot.org>
+
+
+------------------------------------------------------------------------
r1246 | hailfinger | 2010-12-06 14:05:44 +0100 (Mon, 06 Dec 2010) | 7 lines
Simplify get_next_write in the partial write code.
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/Makefile
^
|
| @@ -98,7 +98,7 @@
# of the checked out flashrom files.
# Note to packagers: Any tree exported with "make export" or "make tarball"
# will not require subversion. The downloadable snapshots are already exported.
-SVNVERSION := 1246
+SVNVERSION := 1260
RELEASE := 0.9.3
VERSION := $(RELEASE)-r$(SVNVERSION)
@@ -155,6 +155,9 @@
# Disable Dediprog SF100 until support is complete and tested.
CONFIG_DEDIPROG ?= no
+# Always enable Marvell SATA controllers for now.
+CONFIG_SATAMV ?= yes
+
# Disable wiki printing by default. It is only useful if you have wiki access.
CONFIG_PRINT_WIKI ?= no
@@ -283,6 +286,12 @@
PROGRAMMER_OBJS += dediprog.o
endif
+ifeq ($(CONFIG_SATAMV), yes)
+FEATURE_CFLAGS += -D'CONFIG_SATAMV=1'
+PROGRAMMER_OBJS += satamv.o
+NEED_PCI := yes
+endif
+
ifeq ($(NEED_SERIAL), yes)
LIB_OBJS += serial.o
endif
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/board_enable.c
^
|
| @@ -1135,7 +1135,7 @@
if ( (((1 << gpo) & nonmuxed_gpos) == 0) &&
(pci_read_word(dev, piix4_gpo[gpo].reg) & piix4_gpo[gpo].mask) != piix4_gpo[gpo].value ) {
- msg_perr("\nERROR: PIIX4 GPO\%d not programmed for output.\n", gpo);
+ msg_perr("\nERROR: PIIX4 GPO%d not programmed for output.\n", gpo);
return -1;
}
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/cbtable.c
^
|
| @@ -141,7 +141,7 @@
};
- return 0;
+ return NULL;
}
static void find_mainboard(struct lb_record *ptr, unsigned long addr)
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/chipdrivers.h
^
|
| @@ -119,6 +119,7 @@
int printlock_w39v080a(struct flashchip *flash);
int printlock_w39v080fa(struct flashchip *flash);
int printlock_w39v080fa_dual(struct flashchip *flash);
+int unlock_w39v040fb(struct flashchip *flash);
int unlock_w39v080fa(struct flashchip *flash);
/* w29ee011.c */
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/chipset_enable.c
^
|
| @@ -691,20 +691,20 @@
/* No protection flags for this region?*/
if ((prot & 0x3) == 0)
continue;
- msg_pinfo("SB600 %s%sprotected from %u to %u\n",
+ msg_pinfo("SB600 %s%sprotected from 0x%08x to 0x%08x\n",
(prot & 0x1) ? "write " : "",
(prot & 0x2) ? "read " : "",
- (prot & 0xfffffc00),
- (prot & 0xfffffc00) + ((prot & 0x3ff) << 8));
+ (prot & 0xfffff800),
+ (prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff));
prot &= 0xfffffffc;
rpci_write_byte(dev, reg, prot);
prot = pci_read_long(dev, reg);
if (prot & 0x3)
- msg_perr("SB600 %s%sunprotect failed from %u to %u\n",
+ msg_perr("SB600 %s%sunprotect failed from 0x%08x to 0x%08x\n",
(prot & 0x1) ? "write " : "",
(prot & 0x2) ? "read " : "",
- (prot & 0xfffffc00),
- (prot & 0xfffffc00) + ((prot & 0x3ff) << 8));
+ (prot & 0xfffff800),
+ (prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff));
}
buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH;
@@ -1173,7 +1173,7 @@
int chipset_flash_enable(void)
{
- struct pci_dev *dev = 0;
+ struct pci_dev *dev = NULL;
int ret = -2; /* Nothing! */
int i;
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/cli_classic.c
^
|
| @@ -114,25 +114,25 @@
int operation_specified = 0;
int i;
- const char *optstring = "r:Rw:v:nVEfc:m:l:i:p:Lzh";
- static struct option long_options[] = {
- {"read", 1, 0, 'r'},
- {"write", 1, 0, 'w'},
- {"erase", 0, 0, 'E'},
- {"verify", 1, 0, 'v'},
- {"noverify", 0, 0, 'n'},
- {"chip", 1, 0, 'c'},
- {"mainboard", 1, 0, 'm'},
- {"verbose", 0, 0, 'V'},
- {"force", 0, 0, 'f'},
- {"layout", 1, 0, 'l'},
- {"image", 1, 0, 'i'},
- {"list-supported", 0, 0, 'L'},
- {"list-supported-wiki", 0, 0, 'z'},
- {"programmer", 1, 0, 'p'},
- {"help", 0, 0, 'h'},
- {"version", 0, 0, 'R'},
- {0, 0, 0, 0}
+ static const char optstring[] = "r:Rw:v:nVEfc:m:l:i:p:Lzh";
+ static const struct option long_options[] = {
+ {"read", 1, NULL, 'r'},
+ {"write", 1, NULL, 'w'},
+ {"erase", 0, NULL, 'E'},
+ {"verify", 1, NULL, 'v'},
+ {"noverify", 0, NULL, 'n'},
+ {"chip", 1, NULL, 'c'},
+ {"mainboard", 1, NULL, 'm'},
+ {"verbose", 0, NULL, 'V'},
+ {"force", 0, NULL, 'f'},
+ {"layout", 1, NULL, 'l'},
+ {"image", 1, NULL, 'i'},
+ {"list-supported", 0, NULL, 'L'},
+ {"list-supported-wiki", 0, NULL, 'z'},
+ {"programmer", 1, NULL, 'p'},
+ {"help", 0, NULL, 'h'},
+ {"version", 0, NULL, 'R'},
+ {NULL, 0, NULL, 0}
};
char *filename = NULL;
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/dediprog.c
^
|
| @@ -25,8 +25,10 @@
#include "programmer.h"
#include "spi.h"
+#define FIRMWARE_VERSION(x,y,z) ((x << 16) | (y << 8) | z)
#define DEFAULT_TIMEOUT 3000
static usb_dev_handle *dediprog_handle;
+static int dediprog_firmwareversion;
static int dediprog_endpoint;
#if 0
@@ -57,6 +59,50 @@
//int usb_control_msg(usb_dev_handle *dev, int requesttype, int request, int value, int index, char *bytes, int size, int timeout);
+/* Set/clear LEDs on dediprog */
+#define PASS_ON (0 << 0)
+#define PASS_OFF (1 << 0)
+#define BUSY_ON (0 << 1)
+#define BUSY_OFF (1 << 1)
+#define ERROR_ON (0 << 2)
+#define ERROR_OFF (1 << 2)
+static int current_led_status = -1;
+
+static int dediprog_set_leds(int leds)
+{
+ int ret, target_leds;
+
+ if (leds < 0 || leds > 7)
+ leds = 0; // Bogus value, enable all LEDs
+
+ if (leds == current_led_status)
+ return 0;
+
+ /* Older Dediprogs with 2.x.x and 3.x.x firmware only had
+ * two LEDs, and they were reversed. So map them around if
+ * we have an old device. On those devices the LEDs map as
+ * follows:
+ * bit 2 == 0: green light is on.
+ * bit 0 == 0: red light is on.
+ */
+ if (dediprog_firmwareversion < FIRMWARE_VERSION(5,0,0)) {
+ target_leds = ((leds & ERROR_OFF) >> 2) |
+ ((leds & PASS_OFF) << 2);
+ } else {
+ target_leds = leds;
+ }
+
+ ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, target_leds, NULL, 0x0, DEFAULT_TIMEOUT);
+ if (ret != 0x0) {
+ msg_perr("Command Set LED 0x%x failed (%s)!\n", leds, usb_strerror());
+ return 1;
+ }
+
+ current_led_status = leds;
+
+ return 0;
+}
+
static int dediprog_set_spi_voltage(int millivolt)
{
int ret;
@@ -210,20 +256,26 @@
int residue = start % chunksize ? chunksize - start % chunksize : 0;
int bulklen;
+ dediprog_set_leds(PASS_OFF|BUSY_ON|ERROR_OFF);
+
if (residue) {
msg_pdbg("Slow read for partial block from 0x%x, length 0x%x\n",
start, residue);
ret = spi_read_chunked(flash, buf, start, residue, 16);
- if (ret)
+ if (ret) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return ret;
+ }
}
/* Round down. */
bulklen = (len - residue) / chunksize * chunksize;
ret = dediprog_spi_bulk_read(flash, buf + residue, start + residue,
bulklen);
- if (ret)
+ if (ret) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return ret;
+ }
len -= residue + bulklen;
if (len) {
@@ -231,17 +283,31 @@
start, len);
ret = spi_read_chunked(flash, buf + residue + bulklen,
start + residue + bulklen, len, 16);
- if (ret)
+ if (ret) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return ret;
+ }
}
+ dediprog_set_leds(PASS_ON|BUSY_OFF|ERROR_OFF);
return 0;
}
int dediprog_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len)
{
+ int ret;
+
+ dediprog_set_leds(PASS_OFF|BUSY_ON|ERROR_OFF);
+
/* No idea about the real limit. Maybe 12, maybe more, maybe less. */
- return spi_write_chunked(flash, buf, start, len, 12);
+ ret = spi_write_chunked(flash, buf, start, len, 12);
+
+ if (ret)
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
+ else
+ dediprog_set_leds(PASS_ON|BUSY_OFF|ERROR_OFF);
+
+ return ret;
}
int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
@@ -317,6 +383,7 @@
fw[1], fw[2]);
return 1;
}
+ dediprog_firmwareversion = FIRMWARE_VERSION(fw[0], fw[1], fw[2]);
return 0;
}
@@ -342,6 +409,32 @@
return 0;
}
+#if 0
+/* Something.
+ * Present in eng_detect_blink.log with firmware 3.1.8
+ * Always preceded by Command Receive Device String
+ */
+static int dediprog_command_b(void)
+{
+ int ret;
+ char buf[0x3];
+
+ memset(buf, 0, sizeof(buf));
+ ret = usb_control_msg(dediprog_handle, 0xc3, 0x7, 0x0, 0xef00, buf, 0x3, DEFAULT_TIMEOUT);
+ if (ret < 0) {
+ msg_perr("Command B failed (%s)!\n", usb_strerror());
+ return 1;
+ }
+ if ((ret != 0x3) || (buf[0] != 0xff) || (buf[1] != 0xff) ||
+ (buf[2] != 0xff)) {
+ msg_perr("Unexpected response to Command B!\n");
+ return 1;
+ }
+
+ return 0;
+}
+#endif
+
/* Command C is only sent after dediprog_check_devicestring, but not after every
* invocation of dediprog_check_devicestring. It is only sent after the first
* dediprog_command_a(); dediprog_check_devicestring() sequence in each session.
@@ -353,7 +446,7 @@
ret = usb_control_msg(dediprog_handle, 0x42, 0x4, 0x0, 0x0, NULL, 0x0, DEFAULT_TIMEOUT);
if (ret != 0x0) {
- msg_perr("Unexpected response to Command C!\n");
+ msg_perr("Command C failed (%s)!\n", usb_strerror());
return 1;
}
return 0;
@@ -363,6 +456,7 @@
/* Very strange. Seems to be a programmer keepalive or somesuch.
* Wait unsuccessfully for timeout ms to read one byte.
* Is usually called after setting voltage to 0.
+ * Present in all logs with Firmware 2.1.1 and 3.1.8
*/
static int dediprog_command_f(int timeout)
{
@@ -371,8 +465,12 @@
memset(buf, 0, sizeof(buf));
ret = usb_control_msg(dediprog_handle, 0xc2, 0x11, 0xff, 0xff, buf, 0x1, timeout);
- if (ret != 0x0) {
- msg_perr("Unexpected response to Command F!\n");
+ /* This check is most probably wrong. Command F always causes a timeout
+ * in the logs, so we should check for timeout instead of checking for
+ * success.
+ */
+ if (ret != 0x1) {
+ msg_perr("Command F failed (%s)!\n", usb_strerror());
return 1;
}
return 0;
@@ -478,22 +576,35 @@
return 1;
}
dediprog_endpoint = 2;
+
+ dediprog_set_leds(PASS_ON|BUSY_ON|ERROR_ON);
+
/* URB 6. Command A. */
- if (dediprog_command_a())
+ if (dediprog_command_a()) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return 1;
+ }
/* URB 7. Command A. */
- if (dediprog_command_a())
+ if (dediprog_command_a()) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return 1;
+ }
/* URB 8. Command Prepare Receive Device String. */
/* URB 9. Command Receive Device String. */
- if (dediprog_check_devicestring())
+ if (dediprog_check_devicestring()) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return 1;
+ }
/* URB 10. Command C. */
- if (dediprog_command_c())
+ if (dediprog_command_c()) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return 1;
+ }
/* URB 11. Command Set SPI Voltage. */
- if (dediprog_set_spi_voltage(millivolt))
+ if (dediprog_set_spi_voltage(millivolt)) {
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
return 1;
+ }
buses_supported = CHIP_BUSTYPE_SPI;
spi_controller = SPI_CONTROLLER_DEDIPROG;
@@ -504,6 +615,8 @@
dediprog_do_stuff();
#endif
+ dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_OFF);
+
return 0;
}
@@ -550,9 +663,11 @@
/* URB 136 is just URB 9. */
/* URB 137 is just URB 11. */
- /* Command I is probably Start Bulk Read. Data is u16 blockcount, u16 blocksize. */
- /* Command J is probably Start Bulk Write. Data is u16 blockcount, u16 blocksize. */
- /* Bulk transfer sizes for Command I/J are always 512 bytes, rest is filled with 0xff. */
+ /* Command Start Bulk Read. Data is u16 blockcount, u16 blocksize. */
+ /* Command Start Bulk Write. Data is u16 blockcount, u16 blocksize. */
+ /* Bulk transfer sizes for Command Start Bulk Read/Write are always
+ * 512 bytes, rest is filled with 0xff.
+ */
return 0;
}
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/dummyflasher.c
^
|
| @@ -395,7 +395,7 @@
}
offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
if (offs & (emu_jedec_se_size - 1))
- msg_pdbg("Unaligned SECTOR ERASE 0x20\n");
+ msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs);
offs &= ~(emu_jedec_se_size - 1);
memset(flashchip_contents + offs, 0xff, emu_jedec_se_size);
break;
@@ -412,7 +412,7 @@
}
offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
if (offs & (emu_jedec_be_52_size - 1))
- msg_pdbg("Unaligned BLOCK ERASE 0x52\n");
+ msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs);
offs &= ~(emu_jedec_be_52_size - 1);
memset(flashchip_contents + offs, 0xff, emu_jedec_be_52_size);
break;
@@ -429,7 +429,7 @@
}
offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
if (offs & (emu_jedec_be_d8_size - 1))
- msg_pdbg("Unaligned BLOCK ERASE 0xd8\n");
+ msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs);
offs &= ~(emu_jedec_be_d8_size - 1);
memset(flashchip_contents + offs, 0xff, emu_jedec_be_d8_size);
break;
@@ -444,12 +444,9 @@
msg_perr("CHIP ERASE 0x60 insize invalid!\n");
return 1;
}
- offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
- if (offs & (emu_jedec_ce_60_size - 1))
- msg_pdbg("Unaligned CHIP ERASE 0x60\n");
- offs &= ~(emu_jedec_ce_60_size - 1);
+ /* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */
/* emu_jedec_ce_60_size is emu_chip_size. */
- memset(flashchip_contents + offs, 0xff, emu_jedec_ce_60_size);
+ memset(flashchip_contents, 0xff, emu_jedec_ce_60_size);
break;
case JEDEC_CE_C7:
if (!emu_jedec_ce_c7_size)
@@ -462,10 +459,7 @@
msg_perr("CHIP ERASE 0xc7 insize invalid!\n");
return 1;
}
- offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
- if (offs & (emu_jedec_ce_c7_size - 1))
- msg_pdbg("Unaligned CHIP ERASE 0xc7\n");
- offs &= ~(emu_jedec_ce_c7_size - 1);
+ /* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */
/* emu_jedec_ce_c7_size is emu_chip_size. */
memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size);
break;
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/flash.h
^
|
| @@ -188,7 +188,7 @@
};
extern enum chipbustype buses_supported;
extern int verbose;
-extern const char * const flashrom_version;
+extern const char flashrom_version[];
extern char *chip_to_probe;
void map_flash_registers(struct flashchip *flash);
int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len);
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/flashchips.c
^
|
| @@ -224,6 +224,252 @@
{
.vendor = "AMD",
+ .name = "Am29LV001BB",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV001BB,
+ .total_size = 128,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_OK_PREW,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {8 * 1024, 1},
+ {4 * 1024, 2},
+ {16 * 1024, 7},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {128 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
+ .name = "Am29LV001BT",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV001BT,
+ .total_size = 128,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {16 * 1024, 7},
+ {4 * 1024, 2},
+ {8 * 1024, 1},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {128 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
+ .name = "Am29LV002BB",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV002BB,
+ .total_size = 256,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {16 * 1024, 1},
+ {8 * 1024, 2},
+ {32 * 1024, 1},
+ {64 * 1024, 3},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
+ .name = "Am29LV002BT",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV002BT,
+ .total_size = 256,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {64 * 1024, 3},
+ {32 * 1024, 1},
+ {8 * 1024, 2},
+ {16 * 1024, 1},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
+ .name = "Am29LV004BB",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV004BB,
+ .total_size = 512,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {16 * 1024, 1},
+ {8 * 1024, 2},
+ {32 * 1024, 1},
+ {64 * 1024, 7},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {512 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
+ .name = "Am29LV004BT",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV004BT,
+ .total_size = 512,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {64 * 1024, 7},
+ {32 * 1024, 1},
+ {8 * 1024, 2},
+ {16 * 1024, 1},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {512 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
+ .name = "Am29LV008BB",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV008BB,
+ .total_size = 1024,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {16 * 1024, 1},
+ {8 * 1024, 2},
+ {32 * 1024, 1},
+ {64 * 1024, 15},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {1024 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
+ .name = "Am29LV008BT",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = AMD_ID,
+ .model_id = AMD_AM29LV008BT,
+ .total_size = 1024,
+ .page_size = 64 * 1024, /* unused */
+ .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {64 * 1024, 15},
+ {32 * 1024, 1},
+ {8 * 1024, 2},
+ {16 * 1024, 1},
+ },
+ .block_erase = erase_sector_jedec,
+ }, {
+ .eraseblocks = { {1024 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ },
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "AMD",
.name = "Am29LV040B",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = AMD_ID,
@@ -1477,7 +1723,8 @@
.model_id = ATMEL_AT26DF081A,
.total_size = 1024,
.page_size = 256,
- .tested = TEST_OK_PR,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -1499,7 +1746,7 @@
.block_erase = spi_block_erase_c7,
}
},
- .unlock = spi_disable_blockprotect,
+ .unlock = spi_disable_blockprotect_at25df,
.write = spi_chip_write_256,
.read = spi_chip_read,
},
@@ -3684,7 +3931,7 @@
.total_size = 4096,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
- .tested = TEST_OK_PR,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -7116,7 +7363,7 @@
.total_size = 1024,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
- .tested = TEST_OK_PRE,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -7188,7 +7435,7 @@
.total_size = 4096,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
- .tested = TEST_OK_PRE,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -7224,7 +7471,7 @@
.total_size = 8192,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
- .tested = TEST_OK_PR,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -7706,6 +7953,7 @@
}
},
.printlock = printlock_w39v040fb,
+ .unlock = unlock_w39v040fb,
.write = write_jedec_1,
.read = read_memmapped,
},
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/flashchips.h
^
|
| @@ -70,6 +70,8 @@
#define AMD_AM29F400BT 0x23
#define AMD_AM29F800BB 0x58
#define AMD_AM29F800BT 0xD6
+#define AMD_AM29LV001BB 0x6D
+#define AMD_AM29LV001BT 0xED
#define AMD_AM29LV002BB 0xC2
#define AMD_AM29LV002BT 0x40
#define AMD_AM29LV004BB 0xB6
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/flashrom.c
^
|
| @@ -38,7 +38,7 @@
#include "flashchips.h"
#include "programmer.h"
-const char * const flashrom_version = FLASHROM_VERSION;
+const char flashrom_version[] = FLASHROM_VERSION;
char *chip_to_probe = NULL;
int verbose = 0;
@@ -52,7 +52,7 @@
* if more than one of them is selected. If only one is selected, it is clear
* that the user wants that one to become the default.
*/
-#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI > 1
+#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV > 1
#error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all programmers except one.
#endif
enum programmer programmer =
@@ -99,6 +99,9 @@
#if CONFIG_OGP_SPI == 1
PROGRAMMER_OGP_SPI
#endif
+#if CONFIG_SATAMV == 1
+ PROGRAMMER_SATAMV
+#endif
;
#endif
@@ -461,6 +464,25 @@
},
#endif
+#if CONFIG_SATAMV == 1
+ {
+ .name = "satamv",
+ .init = satamv_init,
+ .shutdown = satamv_shutdown,
+ .map_flash_region = fallback_map,
+ .unmap_flash_region = fallback_unmap,
+ .chip_readb = satamv_chip_readb,
+ .chip_readw = fallback_chip_readw,
+ .chip_readl = fallback_chip_readl,
+ .chip_readn = fallback_chip_readn,
+ .chip_writeb = satamv_chip_writeb,
+ .chip_writew = fallback_chip_writew,
+ .chip_writel = fallback_chip_writel,
+ .chip_writen = fallback_chip_writen,
+ .delay = internal_delay,
+ },
+#endif
+
{}, /* This entry corresponds to PROGRAMMER_INVALID. */
};
@@ -1127,6 +1149,7 @@
{
struct flashchip *flash;
unsigned long base = 0;
+ char location[64];
uint32_t size;
enum chipbustype buses_common;
char *tmp;
@@ -1178,10 +1201,16 @@
if (!flash || !flash->name)
return NULL;
- msg_cinfo("%s chip \"%s %s\" (%d KB, %s) at physical address 0x%lx.\n",
+ if (programmer_table[programmer].map_flash_region == physmap) {
+ snprintf(location, sizeof(location), "at physical address 0x%lx", base);
+ } else {
+ snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name);
+ }
+
+ msg_cinfo("%s chip \"%s %s\" (%d KB, %s) %s.\n",
force ? "Assuming" : "Found",
flash->vendor, flash->name, flash->total_size,
- flashbuses_to_text(flash->bustype), base);
+ flashbuses_to_text(flash->bustype), location);
/* Flash registers will not be mapped if the chip was forced. Lock info
* may be stored in registers, so avoid lock info printing.
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/ichspi.c
^
|
| @@ -948,10 +948,10 @@
static void do_ich9_spi_frap(uint32_t frap, int i)
{
- const char *access_names[4] = {
+ static const char *const access_names[4] = {
"locked", "read-only", "write-only", "read-write"
};
- const char *region_names[5] = {
+ static const char *const region_names[5] = {
"Flash Descriptor", "BIOS", "Management Engine",
"Gigabit Ethernet", "Platform Data"
};
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/physmap.c
^
|
| @@ -180,7 +180,7 @@
}
}
- virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
+ virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED,
fd_mem, (off_t)phys_addr);
return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr;
}
@@ -200,7 +200,7 @@
}
}
- virt_addr = mmap(0, len, PROT_READ, MAP_SHARED,
+ virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED,
fd_mem_cached, (off_t)phys_addr);
return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr;
}
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/print.c
^
|
| @@ -317,6 +317,11 @@
programmer_table[PROGRAMMER_OGP_SPI].name);
print_supported_pcidevs(ogp_spi);
#endif
+#if CONFIG_SATAMV == 1
+ printf("\nSupported devices for the %s programmer:\n",
+ programmer_table[PROGRAMMER_SATAMV].name);
+ print_supported_pcidevs(satas_mv);
+#endif
}
#if CONFIG_INTERNAL == 1
@@ -355,7 +360,7 @@
B("ASRock", "775i65G", 1, "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
B("ASRock", "939A785GMH/128M", 1, "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M&s=939", NULL),
B("ASRock", "A330GC", 1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
- B("ASRock", "A770CrossFire", 1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire&s=AM2\%2b", NULL),
+ B("ASRock", "A770CrossFire", 1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire&s=AM2%%2b", NULL),
B("ASRock", "ALiveNF6G-DVI", 1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
B("ASRock", "K7S41", 1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
B("ASRock", "K7VT4A+", 0, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%%2b&s=", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/print_wiki.c
^
|
| @@ -27,7 +27,7 @@
#include "flashchips.h"
#include "programmer.h"
-static const char * const wiki_header = "= Supported devices =\n\n\
+static const char wiki_header[] = "= Supported devices =\n\n\
<div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \
background-color:#eeeeee; align:right; border:1px solid #aabbcc;\"><small>\n\
Please do '''not''' edit these tables in the wiki directly, they are \
@@ -35,16 +35,16 @@
'''Last update:''' %s(generated by flashrom %s)\n</small></div>\n";
#if CONFIG_INTERNAL == 1
-static const char * const chipset_th = "{| border=\"0\" style=\"font-size: smaller\"\n\
+static const char chipset_th[] = "{| border=\"0\" style=\"font-size: smaller\"\n\
|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\
! align=\"left\" | Southbridge\n! align=\"left\" | PCI IDs\n\
! align=\"left\" | Status\n\n";
-static const char * const board_th = "{| border=\"0\" style=\"font-size: smaller\" \
+static const char board_th[] = "{| border=\"0\" style=\"font-size: smaller\" \
valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\
! align=\"left\" | Mainboard\n! align=\"left\" | Required option\n! align=\"left\" | Status\n\n";
-static const char * const board_intro = "\
+static const char board_intro[] = "\
\n== Supported mainboards ==\n\n\
In general, it is very likely that flashrom works out of the box even if your \
mainboard is not listed below.\n\nThis is a list of mainboards where we have \
@@ -57,14 +57,14 @@
mainboards on the [[Mailinglist|mailing list]].\n";
#endif
-static const char * const chip_th = "{| border=\"0\" style=\"font-size: smaller\" \
+static const char chip_th[] = "{| border=\"0\" style=\"font-size: smaller\" \
valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\
! align=\"left\" | Device\n! align=\"left\" | Size / KB\n\
! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\
|- bgcolor=\"#6699ff\"\n| colspan=\"4\" | \n\
| Probe\n| Read\n| Erase\n| Write\n\n";
-static const char * const programmer_section = "\
+static const char programmer_section[] = "\
\n== Supported programmers ==\n\nThis is a list \
of supported PCI devices flashrom can use as programmer:\n\n{| border=\"0\" \
valign=\"top\"\n| valign=\"top\"|\n\n{| border=\"0\" style=\"font-size: \
@@ -73,7 +73,7 @@
! align=\"left\" | Status\n\n";
#if CONFIG_INTERNAL == 1
-static const char * const laptop_intro = "\n== Supported laptops/notebooks ==\n\n\
+static const char laptop_intro[] = "\n== Supported laptops/notebooks ==\n\n\
In general, flashing laptops is more difficult because laptops\n\n\
* often use the flash chip for stuff besides the BIOS,\n\
* often have special protection stuff which has to be handled by flashrom,\n\
@@ -167,9 +167,9 @@
if (boards[i].note) {
printf("<sup>%d</sup>\n", num_notes + 1);
- snprintf((char *)&tmp, 900, "<sup>%d</sup> %s<br />\n",
+ snprintf(tmp, sizeof(tmp), "<sup>%d</sup> %s<br />\n",
1 + num_notes++, boards[i].note);
- notes = strcat_realloc(notes, (char *)&tmp);
+ notes = strcat_realloc(notes, tmp);
} else {
printf("\n");
}
@@ -302,6 +302,9 @@
#if CONFIG_OGP_SPI == 1
print_supported_pcidevs_wiki(ogp_spi);
#endif
+#if CONFIG_SATAMV == 1
+ print_supported_pcidevs_wiki(satas_mv);
+#endif
printf("\n|}\n");
}
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/programmer.c
^
|
| @@ -30,7 +30,7 @@
void *fallback_map(const char *descr, unsigned long phys_addr, size_t len)
{
/* FIXME: Should return phys_addr. */
- return 0;
+ return NULL;
}
/* No-op/fallback unmap() for programmers which don't need special handling */
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/programmer.h
^
|
| @@ -79,6 +79,9 @@
#if CONFIG_OGP_SPI == 1
PROGRAMMER_OGP_SPI,
#endif
+#if CONFIG_SATAMV == 1
+ PROGRAMMER_SATAMV,
+#endif
PROGRAMMER_INVALID /* This must always be the last entry. */
};
@@ -221,9 +224,9 @@
/* rpci_write_* are reversible writes. The original PCI config space register
* contents will be restored on shutdown.
*/
-int rpci_write_byte(struct pci_dev *dev, int reg, u8 data);
-int rpci_write_word(struct pci_dev *dev, int reg, u16 data);
-int rpci_write_long(struct pci_dev *dev, int reg, u32 data);
+int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data);
+int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
+int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
#endif
/* print.c */
@@ -415,6 +418,15 @@
extern const struct pcidev_status ogp_spi[];
#endif
+/* satamv.c */
+#if CONFIG_SATAMV == 1
+int satamv_init(void);
+int satamv_shutdown(void);
+void satamv_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t satamv_chip_readb(const chipaddr addr);
+extern const struct pcidev_status satas_mv[];
+#endif
+
/* satasii.c */
#if CONFIG_SATASII == 1
int satasii_init(void);
|
|
[-]
[+]
|
Added |
flashrom-0.9.3_r1260.tar.bz2/satamv.c
^
|
| @@ -0,0 +1,183 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010,2011 Carl-Daniel Hailfinger
+ * Written by Carl-Daniel Hailfinger for Angelbird Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* Datasheets are not public (yet?) */
+
+#include <stdlib.h>
+#include "flash.h"
+#include "programmer.h"
+
+uint8_t *mv_bar;
+uint16_t mv_iobar;
+
+const struct pcidev_status satas_mv[] = {
+ /* 88SX6041 and 88SX6042 are the same according to the datasheet. */
+ {0x11ab, 0x7042, OK, "Marvell", "88SX7042 PCI-e 4-port SATA-II"},
+
+ {},
+};
+
+#define NVRAM_PARAM 0x1045c
+#define FLASH_PARAM 0x1046c
+#define EXPANSION_ROM_BAR_CONTROL 0x00d2c
+#define PCI_BAR2_CONTROL 0x00c08
+#define GPIO_PORT_CONTROL 0x104f0
+
+/*
+ * Random notes:
+ * FCE# Flash Chip Enable
+ * FWE# Flash Write Enable
+ * FOE# Flash Output Enable
+ * FALE[1:0] Flash Address Latch Enable
+ * FAD[7:0] Flash Multiplexed Address/Data Bus
+ * FA[2:0] Flash Address Low
+ *
+ * GPIO[15,2] GPIO Port Mode
+ * GPIO[4:3] Flash Size
+ *
+ * 0xd2c Expansion ROM BAR Control
+ * 0xc08 PCI BAR2 (Flash/NVRAM) Control
+ * 0x1046c Flash Parameters
+ */
+int satamv_init(void)
+{
+ uintptr_t addr;
+ uint32_t tmp;
+
+ get_io_perms();
+
+ /* BAR0 has all internal registers memory mapped. */
+ /* No need to check for errors, pcidev_init() will not return in case
+ * of errors.
+ */
+ addr = pcidev_init(0x11ab, PCI_BASE_ADDRESS_0, satas_mv);
+
+ mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000);
+ if (mv_bar == ERROR_PTR)
+ goto error_out;
+
+ tmp = pci_mmio_readl(mv_bar + FLASH_PARAM);
+ msg_pspew("Flash Parameters:\n");
+ msg_pspew("TurnOff=0x%01x\n", (tmp >> 0) & 0x7);
+ msg_pspew("Acc2First=0x%01x\n", (tmp >> 3) & 0xf);
+ msg_pspew("Acc2Next=0x%01x\n", (tmp >> 7) & 0xf);
+ msg_pspew("ALE2Wr=0x%01x\n", (tmp >> 11) & 0x7);
+ msg_pspew("WrLow=0x%01x\n", (tmp >> 14) & 0x7);
+ msg_pspew("WrHigh=0x%01x\n", (tmp >> 17) & 0x7);
+ msg_pspew("Reserved[21:20]=0x%01x\n", (tmp >> 20) & 0x3);
+ msg_pspew("TurnOffExt=0x%01x\n", (tmp >> 22) & 0x1);
+ msg_pspew("Acc2FirstExt=0x%01x\n", (tmp >> 23) & 0x1);
+ msg_pspew("Acc2NextExt=0x%01x\n", (tmp >> 24) & 0x1);
+ msg_pspew("ALE2WrExt=0x%01x\n", (tmp >> 25) & 0x1);
+ msg_pspew("WrLowExt=0x%01x\n", (tmp >> 26) & 0x1);
+ msg_pspew("WrHighExt=0x%01x\n", (tmp >> 27) & 0x1);
+ msg_pspew("Reserved[31:28]=0x%01x\n", (tmp >> 28) & 0xf);
+
+ tmp = pci_mmio_readl(mv_bar + EXPANSION_ROM_BAR_CONTROL);
+ msg_pspew("Expansion ROM BAR Control:\n");
+ msg_pspew("ExpROMSz=0x%01x\n", (tmp >> 19) & 0x7);
+
+ /* Enable BAR2 mapping to flash */
+ tmp = pci_mmio_readl(mv_bar + PCI_BAR2_CONTROL);
+ msg_pspew("PCI BAR2 (Flash/NVRAM) Control:\n");
+ msg_pspew("Bar2En=0x%01x\n", (tmp >> 0) & 0x1);
+ msg_pspew("BAR2TransAttr=0x%01x\n", (tmp >> 1) & 0x1f);
+ msg_pspew("BAR2Sz=0x%01x\n", (tmp >> 19) & 0x7);
+ tmp &= 0xffffffc0;
+ tmp |= 0x0000001f;
+ /* FIXME: This needs to be an auto-reversible write. */
+ pci_mmio_writel(tmp, mv_bar + PCI_BAR2_CONTROL);
+
+ /* Enable flash: GPIO Port Control Register 0x104f0 */
+ tmp = pci_mmio_readl(mv_bar + GPIO_PORT_CONTROL);
+ msg_pspew("GPIOPortMode=0x%01x\n", (tmp >> 0) & 0x3);
+ if (((tmp >> 0) & 0x3) != 0x2)
+ msg_pinfo("Warning! Either the straps are incorrect or you "
+ "have no flash or someone overwrote the strap "
+ "values!\n");
+ tmp &= 0xfffffffc;
+ tmp |= 0x2;
+ /* FIXME: This needs to be an auto-reversible write. */
+ pci_mmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL);
+
+ /* Get I/O BAR location. */
+ tmp = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_2) &
+ PCI_BASE_ADDRESS_IO_MASK;
+ /* Truncate to reachable range.
+ * FIXME: Check if the I/O BAR is actually reachable.
+ * This is an arch specific check.
+ */
+ mv_iobar = tmp & 0xffff;
+ msg_pspew("Activating I/O BAR at 0x%04x\n", mv_iobar);
+
+ buses_supported = CHIP_BUSTYPE_PARALLEL;
+
+ /* 512 kByte with two 8-bit latches, and
+ * 4 MByte with additional 3-bit latch. */
+ max_rom_decode.parallel = 4 * 1024 * 1024;
+
+ return 0;
+
+error_out:
+ pci_cleanup(pacc);
+ release_io_perms();
+ return 1;
+}
+
+int satamv_shutdown(void)
+{
+ physunmap(mv_bar, 0x20000);
+ pci_cleanup(pacc);
+ release_io_perms();
+ return 0;
+}
+
+/* BAR2 (MEM) can map NVRAM and flash. We set it to flash in the init function.
+ * If BAR2 is disabled, it still can be accessed indirectly via BAR1 (I/O).
+ * This code only supports indirect accesses for now.
+ */
+
+/* Indirect access to via the I/O BAR1. */
+static void satamv_indirect_chip_writeb(uint8_t val, chipaddr addr)
+{
+ /* 0x80000000 selects BAR2 for remapping. */
+ OUTL(((uint32_t)addr | 0x80000000) & 0xfffffffc, mv_iobar);
+ OUTB(val, mv_iobar + 0x80 + (addr & 0x3));
+}
+
+/* Indirect access to via the I/O BAR1. */
+static uint8_t satamv_indirect_chip_readb(const chipaddr addr)
+{
+ /* 0x80000000 selects BAR2 for remapping. */
+ OUTL(((uint32_t)addr | 0x80000000) & 0xfffffffc, mv_iobar);
+ return INB(mv_iobar + 0x80 + (addr & 0x3));
+}
+
+/* FIXME: Prefer direct access to BAR2 if BAR2 is active. */
+void satamv_chip_writeb(uint8_t val, chipaddr addr)
+{
+ satamv_indirect_chip_writeb(val, addr);
+}
+
+/* FIXME: Prefer direct access to BAR2 if BAR2 is active. */
+uint8_t satamv_chip_readb(const chipaddr addr)
+{
+ return satamv_indirect_chip_readb(addr);
+}
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/sb600spi.c
^
|
| @@ -208,7 +208,7 @@
struct pci_dev *smbus_dev;
uint32_t tmp;
uint8_t reg;
- const char *speed_names[4] = {
+ static const char *const speed_names[4] = {
"Reserved", "33", "22", "16.5"
};
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/serprog.c
^
|
| @@ -541,7 +541,7 @@
{
if ((sp_max_write_n) && (sp_write_n_bytes))
sp_pass_writen();
- sp_stream_buffer_op(S_CMD_O_EXEC, 0, 0);
+ sp_stream_buffer_op(S_CMD_O_EXEC, 0, NULL);
msg_pspew(MSGHEADER "Executed operation buffer of %d bytes\n",
sp_opbuf_usage);
sp_opbuf_usage = 0;
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/spi25.c
^
|
| @@ -33,7 +33,7 @@
static int spi_rdid(unsigned char *readarr, int bytes)
{
- const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
+ static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
int ret;
int i;
@@ -95,7 +95,7 @@
int spi_write_enable(void)
{
- const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN };
+ static const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN };
int result;
/* Send WREN (Write Enable) */
@@ -109,7 +109,7 @@
int spi_write_disable(void)
{
- const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI };
+ static const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI };
/* Send WRDI (Write Disable) */
return spi_send_command(sizeof(cmd), 0, cmd, NULL);
@@ -232,10 +232,10 @@
int probe_spi_res1(struct flashchip *flash)
{
+ static const unsigned char allff[] = {0xff, 0xff, 0xff};
+ static const unsigned char all00[] = {0x00, 0x00, 0x00};
unsigned char readarr[3];
uint32_t id2;
- const unsigned char allff[] = {0xff, 0xff, 0xff};
- const unsigned char all00[] = {0x00, 0x00, 0x00};
/* We only want one-byte RES if RDID and REMS are unusable. */
@@ -298,7 +298,7 @@
uint8_t spi_read_status_register(void)
{
- const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
+ static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
/* FIXME: No workarounds for driver/hardware bugs in generic code. */
unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */
int ret;
@@ -486,7 +486,7 @@
*/
void spi_prettyprint_status_register_sst25vf016(uint8_t status)
{
- const char *bpt[] = {
+ static const char *const bpt[] = {
"none",
"1F0000H-1FFFFFH",
"1E0000H-1FFFFFH",
@@ -502,7 +502,7 @@
void spi_prettyprint_status_register_sst25vf040b(uint8_t status)
{
- const char *bpt[] = {
+ static const char *const bpt[] = {
"none",
"0x70000-0x7ffff",
"0x60000-0x7ffff",
@@ -837,7 +837,7 @@
int spi_write_status_enable(void)
{
- const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
+ static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
int result;
/* Send EWSR (Enable Write Status Register). */
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/stm50flw0x0x.c
^
|
| @@ -39,7 +39,7 @@
static int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
{
chipaddr wrprotect = flash->virtual_registers + 2;
- const uint8_t unlock_sector = 0x00;
+ static const uint8_t unlock_sector = 0x00;
int j;
/*
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/udelay.c
^
|
| @@ -45,11 +45,11 @@
struct timeval start, end;
unsigned long counter = 0;
- gettimeofday(&start, 0);
+ gettimeofday(&start, NULL);
timeusec = 0;
while (!timeusec && (++counter < 1000000000)) {
- gettimeofday(&end, 0);
+ gettimeofday(&end, NULL);
timeusec = 1000000 * (end.tv_sec - start.tv_sec) +
(end.tv_usec - start.tv_usec);
/* Protect against time going forward too much. */
@@ -68,9 +68,9 @@
unsigned long timeusec;
struct timeval start, end;
- gettimeofday(&start, 0);
+ gettimeofday(&start, NULL);
myusec_delay(usecs);
- gettimeofday(&end, 0);
+ gettimeofday(&end, NULL);
timeusec = 1000000 * (end.tv_sec - start.tv_sec) +
(end.tv_usec - start.tv_usec);
/* Protect against time going forward too much. */
|
|
[-]
[+]
|
Changed |
flashrom-0.9.3_r1260.tar.bz2/w39.c
^
|
| @@ -244,6 +244,16 @@
return -1;
}
+int unlock_w39v040fb(struct flashchip *flash)
+{
+ if (unlock_w39_fwh(flash))
+ return -1;
+ if (printlock_w39_common(flash, 0x7fff2))
+ return -1;
+
+ return 0;
+}
+
int unlock_w39v080fa(struct flashchip *flash)
{
if (unlock_w39_fwh(flash))
|
